Verilog Shift Operators

There are two types of shift operators: the logical shift operators, << and >>, and the arithmetic shift operators, <<< and >>>. The left shift operators, << and <<<, shall shift their left operand to the left by the number by the number of bit positions given by the right operand. In both cases, the vacated bit positions shall be filled with zeroes. The right shift operators, >> and >>>, shall shift their left operand to the right by the number of bit positions given by the right operand. The logical right shift shall fill the vacated bit positions with zeroes.

For example —In this example, the reg result is assigned the binary value 0100, which is 0001 shifted to the left two positions and zero-filled.

module shift; 
reg [3:0] start, result; 
initial begin start = 1; 
result = (start << 2); 
end
endmodule

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