Verilog Conditional Operator

The evaluation of a conditional operator shall begin with a logical equality comparison of expression1 with zero, termed the condition. If the condition evaluates to false (0), then expression3 shall be
evaluated and used as the result of the conditional expression. If the condition evaluates to true (1), then
expression2 is evaluated and used as the result.

result = expression1(condition) ? expression2 : expression3

For example:
The following example of a three-state output bus illustrates a common use of the conditional operator:
The bus called data is driven onto busa when drive_busa is 1. If drive_busa is 0, then an
value 8 is driven onto busa. Otherwise, busa is not driven.

wire [15:0] busa = drive_busa ? data : 16'b8;

<< Previous | Next >>

Verilog Shift Operators

There are two types of shift operators: the logical shift operators, << and >>, and the arithmetic shift operators, <<< and >>>. The left shift operators, << and <<<, shall shift their left operand to the left by the number by the number of bit positions given by the right operand. In both cases, the vacated bit positions shall be filled with zeroes. The right shift operators, >> and >>>, shall shift their left operand to the right by the number of bit positions given by the right operand. The logical right shift shall fill the vacated bit positions with zeroes.

For example —In this example, the reg result is assigned the binary value 0100, which is 0001 shifted to the left two positions and zero-filled.

module shift; 
reg [3:0] start, result; 
initial begin start = 1; 
result = (start << 2); 
end
endmodule

<< Previous | Next >>

Verilog Reduction Operators

The unary reduction operators shall perform a bitwise operation on a single operand to produce a single-bit result. For reduction and, reduction or, and reduction xor operators, the first step of the operation shall apply the operator between the first bit of the operand and the second using below logic Tables.
The second and subsequent steps shall apply the operator between the 1-bit result of the prior step and the next bit of the operand using the same logic table.
Reduction unary and operator:

Reduction unary or operator:

Reduction unary exclusive or operator:

For example: below table shows the results of applying reduction operators on different operands-

<< Previous | Next >>